SpacemiT recently completed a Series A+ funding round, raising several hundred million yuan. The round was led by the Hong Kong Brizan III Fund and will primarily be used for the research and development of high-performance RISC-V AI CPUs, server AI CPU products, and market expansion. The funding aims to accelerate the iteration of SpacemiT’s RISC-V products and the growth of its ecosystem.

In the three years since its establishment, SpacemiT has rapidly developed a full-stack computing technology that includes high-performance RISC-V CPU cores, AI-CPU cores, AI CPU chips, and system software. This has enabled the company to offer a comprehensive computing system solution, with the goal of building the best native computing platform for large-scale AI models using RISC-V AI CPUs. SpacemiT is also supporting the development of new applications, including AI computers and AI robots.

The success of this financing round is largely attributed to SpacemiT’s outstanding chip mass production capabilities and significant breakthroughs in the development of server CPU chips.

SpacemiT’s RISC-V AI CPU chip, the SpacemiT Key Stone® K1, has successfully expanded the application of RISC-V high-performance computing chips from the developer market to the industrial sector. It is now being applied in various industries, including energy, telecommunications, robotics, and consumer electronics.

Additionally, SpacemiT continues to focus on the development of server CPU chips, which are more challenging and have a longer development cycle. The company has made significant progress in this area, having essentially completed all core technology developments and established a server CPU chip platform. SpacemiT is now the first in the industry to offer a complete RISC-V CPU chip software and hardware platform that supports server specifications.

Key IPs:

RISC-V CPU core X100, AIA and APLIC supporting interrupt virtualization, IOMMU supporting memory virtualization, IOPMP supporting security functions, LPC and eSPI supporting communication with mainstream BMCs, etc.

Key Subsystems:

Including CPU subsystem, bus subsystem, IOMMU subsystem, interrupt subsystem, Debug & Trace subsystem, clock & reset subsystem, RMU management and control subsystem, etc., thereby realizing the development of the server CPU chip platform.

Software R&D Progress:

Based on the self-developed server CPU chip platform, the development of server platform firmware that complies with the RISC-V BRS Spec specification has been completed. This includes openSBI/UEFI (BIOS)/Linux and other low-level software that meets the requirements of the Supervisor Binary Interface (SBI), UEFI (BIOS), SMBIOS, ACPI, and other specifications. The Linux operating system has been adapted and ported, and it supports the GlobalPlatform-standard OP-TEE secure operating system. The platform firmware and operating system can now be successfully run and demonstrated on an FPGA of the server CPU chip platform.